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[ EARLY 8-BIT AND 16-BIT PROCESSORS // IDENTIFIED CPU ]

Zilog Z80A (4 MHz)

Zilog Z80 family introduced 1976; 4 MHz NMOS speed grade. 8-bit bus/ALU, 16-bit address, two register banks/index registers, 40-pin DIP, 4 MHz.

Photograph of Zilog Z80A (4 MHz)
PHOTOGRAPH — Christian Bassow, CC BY-SA 4.0 · FILE ON WIKIMEDIA COMMONS

MODEL IDENTIFICATION: Zilog Z80A (4 MHz). Match full model suffix, stepping and package to the physical item and cited documentation.

Recorded specifications

Cataloged modelZilog Z80A (4 MHz)
Era / familyZilog Z80 family introduced 1976; 4 MHz NMOS speed grade.
Model specifications8-bit bus/ALU, 16-bit address, two register banks/index registers, 40-pin DIP, 4 MHz.
CompatibilityZ80 bus/control timing required; shared 8080 subset is not pin compatibility.
Variants / limitsZ80B/CMOS Z84C00 have different ratings.

Compatibility and variants

  • Z80 bus/control timing required; shared 8080 subset is not pin compatibility.
  • Z80B/CMOS Z84C00 have different ratings.
  • Check system-vendor CPU support, board revision, firmware minimum, package, memory, cooling and power before installation; similar socket naming does not prove compatibility.

Service and archival notes

Record speed mark, oscillator, memory map and support chips.

Archive the complete marking/OPN/sSpec, stepping, physical condition, tested host revision, firmware, memory population, cooling, and test conditions. Distinguish published limits from measurements.

Sources & further reading

  1. Model lookup — Zilog Z80A (4 MHz)Model-specific package and specification cross-reference.
  2. Manufacturer technical documents — Zilog Z80A (4 MHz)Archived manufacturer data sheets/manuals for the exact family.
  3. Computer History Museum — Zilog Z80A (4 MHz) historyInstitutional history of early microprocessor development.
  4. Various Creators — Z80/Z180 Retro computer overview 2026Independent video review; treat as supplementary context, not primary manufacturer documentation.

Use the matching manufacturer data sheet revision and platform vendor’s CPU list for final fit decisions.